发明名称 CAPACITIVE LOAD DRIVING CIRCUIT FOR SCANNING ELECTRODE, AND PLASMA DISPLAY PANEL
摘要 PROBLEM TO BE SOLVED: To avoid increase in the circuit scale and the control wiring, and to reduce noise at the time of simultaneous scanning line driving operations and electromagnetic radiation interference accompanying it. SOLUTION: The capacitive load driving circuit includes at least one delay element for delaying an input control signal which operates a plurality of driving signals all at once, a plurality of timing circuits composed of circuits for receiving the input control signal and circuits for receiving the delayed signal, and a plurality of high-voltage output circuits for receiving a corresponding output signal from the plurality of timing circuits and outputting a driving signal. The plurality of high-voltage output circuits are classified according to an output signal inputted, and output a plurality of driving signals which change with a plurality of different phases for each classification. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009188531(A) 申请公布日期 2009.08.20
申请号 JP20080024141 申请日期 2008.02.04
申请人 PANASONIC CORP 发明人 YOSHIDA SEIYA;ANDO HITOSHI;MATSUNAGA HIROKI;KANEDA JINSAKU;FUJIMOTO YOSHITERU
分类号 H03K17/16;G09G3/20;G09G3/28;G09G3/288;H03K17/687;H03K17/693 主分类号 H03K17/16
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