METHOD FOR MANUFACTURING WAFER LEVEL CHIP SCALE PACKAGE

摘要

A manufacturing method of a wafer level chip scale package is provided to improve productivity and to reduce failure rate by physically forming a circuit pattern and an exposure pattern of a redistribution layer through an imprinting mold and a template. A metal layer is formed on a top surface of a wafer(10) in order to cover an electrode pad. An etching stop layer is formed on a top surface of the metal layer. An etching pattern is formed by pressurizing an imprinting mold on the etching stop layer. A circuit pattern(31) of a redistribution line is formed by etching the metal layer and the etching pattern of the etching stop layer. An encapsulation layer is formed on a top surface of the wafer in order to cover the circuit pattern of the redistribution line. A part of the circuit pattern of the redistribution line is exposed by pressurizing a template on the encapsulation layer. A supporting post(80) is formed on the circuit pattern of the exposed redistribution lien.