| 摘要 |
<p>A new category of integrated circuitry and a new methodology for adaptive or reconfigurable computing is provided. The preferred IC embodiment includes a plurality of heterogeneous computational elements coupled to an interconnection network. The plurality of heterogeneous computational elements includes computational elements having differing architectures for performing different functions such as memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output and field programmability. In response to configuration information, the interconnection network is operative in real-time to configure and reconfigure the plurality of heterogeneous computational elements for a plurality of different functional modes including linear algorithmic operations, non-linear algorithmic operations, finite state machine operations and bit-level manipulations. The various architectures are selected to comparatively minimize power consumption and increase performance of the adaptive computing integrated circuit which is particularly suitable for mobile, hand-held or other battery powered computing applications.</p> |
