| 摘要 |
It is arranged that a delay line, through which a delay determination clock signal is passed so as to determine a reference delay value, and a delay line, through which a data strobe signal is passed so as to impart a predetermined delay to the data strobe signal during reading of a memory, be a common delay line, and a selector is used to select which is to be inputted to the common delay line, the delay determination clock signal or the data strobe signal. A data storing area is provided which stores both a digital data used when the reference delay value is determined and a digital data used when the delay is imparted to the data strobe signal. A memory access controller is used to control, based on a stored value of the data storing area, the switching of the selector. ® KIPO & WIPO 2009
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