| 摘要 |
A signal processing apparatus includes an analog signal outputting circuit configured to output an analog signal divided into blocks in synchronization with a clock. An operation circuit is configured to operate in a clamping state to hold a reference signal and in a signal outputting state to output an effective signal by performing a specific operation on the analog signal with respect to the reference signal. A control circuit is configured to control the operation circuit and causes the operation circuit to operate in the clamping state longer than a period in which one block of the analog signal is output while the operation circuit remains in the signal outputting state.
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