发明名称 Method for integrating SIGE NPN and Vertical PNP Devices
摘要 According to one exemplary embodiment, a method for forming an NPN and a vertical PNP device on a substrate comprises forming an insulating layer over an NPN region and a PNP region of the substrate. The method further comprises forming a buffer layer on the insulating layer and forming an opening in the buffer layer and the insulating layer in the NPN region, where the opening exposes the substrate. The method further comprises forming a semiconductor layer on the buffer layer and in the opening in the NPN region, where the semiconductor layer has a first portion situated in the opening and a second portion situated on the buffer layer in the PNP region. The first portion of the semiconductor layer forms a single crystal base of the NPN device and the second portion of the semiconductor layer forms a polycrystalline emitter of the vertical PNP device.
申请公布号 US2009203183(A1) 申请公布日期 2009.08.13
申请号 US20090384937 申请日期 2009.04.10
申请人 NEWPORT FAB, LLC DBA JAZZ SEMICONDUCTOR 发明人 HURWITZ PAUL D.;RING KENNETH M.;HU CHUN;KALBURGE AMOL M.
分类号 H01L21/8228 主分类号 H01L21/8228
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