发明名称 Memory Element with Positive Temperature Coefficient Layer
摘要 An integrated circuit including a memory element and method for manufacturing the integrated circuit are described. In some embodiments, the memory element includes a switching layer that selectively switches between a low resistance state and a high resistance state, and a positive temperature coefficient layer in thermal contact with the switching layer, the positive temperature coefficient layer having a resistance that increases in response to an increase in temperature.
申请公布号 US2009201716(A1) 申请公布日期 2009.08.13
申请号 US20080030059 申请日期 2008.02.12
申请人 UFERT KLAUS-DIETER 发明人 UFERT KLAUS-DIETER
分类号 G11C11/00;H01L21/00;H01L29/02 主分类号 G11C11/00
代理机构 代理人
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