| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of clarifying defectiveness of data corresponding to any I/O and reducing a delay difference in read timing of data in a normal operation among all the I/Os. SOLUTION: The semiconductor memory device includes a memory cell for storing data, a data input part for inputting data to be stored in the memory cell, and a data output part for outputting the data stored in the memory cell. The data input part includes a branch circuit for inputting, during inputting of the test mode of data stored in the memory cell, a signal input to representative I/O terminals of one of a plurality of I/O terminals formed into a block to all the I/O terminals. The data output part includes a selection circuit disposed in the representative I/O terminal to select and output each data read from the memory corresponding to each I/O terminal formed into the block from the representative I/O terminal, and a dummy circuit disposed before the I/O terminal other than the representative I/O terminal. COPYRIGHT: (C)2009,JPO&INPIT |
