发明名称 |
Resistive Memory Element and Method of Fabrication |
摘要 |
An integrated circuit including a memory cell and a method of manufacturing the integrated circuit are described. The memory cell includes a buried gate select transistor and a resistive memory element coupled to the buried gate select transistor. The resistive memory element stores information based on a resistivity of the resistive memory element.
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申请公布号 |
US2009200533(A1) |
申请公布日期 |
2009.08.13 |
申请号 |
US20080028513 |
申请日期 |
2008.02.08 |
申请人 |
UFERT KLAUS-DIETER;WILLER JOSEF |
发明人 |
UFERT KLAUS-DIETER;WILLER JOSEF |
分类号 |
H01L47/00;H01L21/00 |
主分类号 |
H01L47/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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