发明名称 DEVICE PACKAGING BOARD AND METHOD FOR MANUFACTURING SAME, SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING SAME, AND PORTABLE DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To reduce concentration of thermal stress on a bump structure by a structure connecting the bump structure and an electrode of the semiconductor device. <P>SOLUTION: A device packaging board 10 includes: an insulating resin layer 12; a wiring layer 14 provided on one main surface S1 of the insulating resin layer 12; and a bump electrode 16 which is electrically connected to the wiring layer 14 and protrudes on a side of the insulating resin layer 12 from the wiring layer 14. A side surface of the bump electrode 16 is curved inwardly toward a center axis 16z of the bump electrode 16 as viewed in a cross section including the center axis 16z, and the radius of curvature of the side surface continuously changes from a wiring layer end 16a to a head end 16b. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009182274(A) 申请公布日期 2009.08.13
申请号 JP20080022013 申请日期 2008.01.31
申请人 SANYO ELECTRIC CO LTD 发明人 KOBAYASHI HAJIME;YANASE YASUYUKI
分类号 H01L23/12;H01L21/60 主分类号 H01L23/12
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