发明名称 Semiconductor memory device
摘要 There are provided a row predecoder that predocodes an address irrespective of whether the address to which access is requested is a defective address, a row main decoder that controls a sub-word driver, based on a predecode signal generated by the row predecoder, and a repair determining circuit that determines whether the address is a defective address. The row main decoder, the row predecoder, and the repair determining circuit all have a shape in which a column direction is set to be a longitudinal direction. The row predecoder and the repair determining circuit are arranged adjacent to each other in the column direction, and are arranged in parallel with the row main decoder.
申请公布号 US2009201752(A1) 申请公布日期 2009.08.13
申请号 US20090320891 申请日期 2009.02.06
申请人 ELPIDA MEMORY, INC. 发明人 RIHO YOSHIRO;FUJIKAWA ATSUSHI
分类号 G11C29/04;G11C8/10;G11C17/16 主分类号 G11C29/04
代理机构 代理人
主权项
地址