发明名称 Method for verifying
摘要 A method for verifying at least one aspects of a digital circuit, the method comprising: providing a set of operations to be performed by the digital circuit, each one of the set of operations having at least one functional element; identifying a first subset of a plurality of the at least one functional element; describing in a description the plurality of the at least one functional element of the identified first subset in terms of properties, each one of the properties having an assumption component and a proof component; formally verifying each one of the properties; arranging the plurality of the at least one functional element of the identified first subset to be proven for the digital circuit in an arrangement with temporal relations satisfying at least said description; analysing completeness of the arrangement of the plurality of the at least one functional element to verify that the at least one aspects of the digital circuit are completely verified.
申请公布号 EP2088521(A1) 申请公布日期 2009.08.12
申请号 EP20080002479 申请日期 2008.02.11
申请人 ONESPIN SOLUTIONS GMBH 发明人 BEYER, SVEN;SCHOENHERR, JENS;BORMANN, JOERG
分类号 G06F17/50 主分类号 G06F17/50
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