发明名称 Hardware-based encryption/decryption employing dual ported memory and fast table initialization
摘要 A system for the encryption and decryption of data employing dual ported RAM to accelerate data processing operations during the computation of the encryption and decryption algorithm. The system includes logic to track data changes in the dual ported memory for fast table initialization; a means to accelerate operations by performing read/write operations in different iterations of the algorithm to separate ports on the dual ported RAM in the same clock cycle; and a means to resolve data manipulation conflicts between out of order read/write operations so that the system correctly computes the desired algorithm.
申请公布号 US7574571(B2) 申请公布日期 2009.08.11
申请号 US20050289797 申请日期 2005.11.30
申请人 CISCO TECHNOLOGY, INC. 发明人 BATCHER KENNETH W.
分类号 G06F12/16;H04L9/00;H04L9/06;H04L9/18 主分类号 G06F12/16
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