发明名称 System and Method for Data Processing Using a Low-Cost Two-Tier Full-Graph Interconnect Architecture
摘要 A system and method are provided for implementing a two-tier full-graph interconnect architecture. In order to implement a two-tier full-graph interconnect architecture, a plurality of processors are coupled to one another to create a plurality of supernodes. Then, the plurality of supernodes are coupled together to create the two-tier full-graph interconnect architecture. Data is then transmitted from one processor to another within the two-tier full-graph interconnect architecture based on an addressing scheme that specifies at least a supernode and a processor chip identifier associated with a target processor to which the data is to be transmitted.
申请公布号 US2009198956(A1) 申请公布日期 2009.08.06
申请号 US20080024662 申请日期 2008.02.01
申请人 ARIMILLI LAKSHMINARAYANA B;ARIMILLI RAVI K;RAJAMONY RAMAKRISHNAN;SEMINARO EDWARD J;SPEIGHT WILLIAM E 发明人 ARIMILLI LAKSHMINARAYANA B.;ARIMILLI RAVI K.;RAJAMONY RAMAKRISHNAN;SEMINARO EDWARD J.;SPEIGHT WILLIAM E.
分类号 G06F15/80;G06F9/00;G06F15/76 主分类号 G06F15/80
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