发明名称 SEMICONDUCTOR CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
摘要 A first wiring pattern is formed on the front surface of a first supporting plate; a semiconductor chip is disposed on the first wiring pattern; and the electrode terminal of the semiconductor chip and the necessary place of the first wiring pattern are connected electrically. A post electrode connected to a second wiring pattern of a post electrode component with wirings integrally connected by a second supporting plate is batch fixed at a predetermined position of the first wiring pattern formed on the first supporting plate and connected electrically. After resin sealing, the first and second supporting plates are peeled off; a glass substrate is stuck to the side of a front surface; and an external electrode to be connected to the second wiring pattern is formed on the side of rear surface.
申请公布号 WO2009096240(A1) 申请公布日期 2009.08.06
申请号 WO2009JP50530 申请日期 2009.01.16
申请人 KYUSHU INSTITUTE OF TECHNOLOGY;ISHIHARA, MASAMICHI;UEDA, HIROTAKA 发明人 ISHIHARA, MASAMICHI;UEDA, HIROTAKA
分类号 H01L23/12;H01L27/14 主分类号 H01L23/12
代理机构 代理人
主权项
地址