| 摘要 |
An apparatus and a method for testing a memory device are provided to reduce a test time without an additional post process by determining the pass / fail of a block and a sector based on the result of the determination test. A pattern generation part(33) produces a test pattern, and a capture logic unit(32) reads data from a memory in which the test pattern is recorded. A comparison logic part(34) compares data and the test pattern read on the capture logic, and a fail logic determines whether a block is fail or not by accumulating the number of a fail bit in a test unit based on the comparison result. A defect block processing unit(36) accumulates the number of a defect block which is determined as a defect block, and stores the position of the detect block. |
