发明名称 METHOD FOR ACCESSING MEMORY CHIP
摘要 <P>PROBLEM TO BE SOLVED: To provide an access method by which the number of input pins of a memory can be decreased in order to reduce electrical wiring density of a memory module, and to save test costs of a memory chip. <P>SOLUTION: A method for accessing a memory chip comprises: a step in which a plurality of first input pins and a plurality of second input pins are provided at the memory chip; a step in which a plurality of row address signals are input respectively to the first input pins; and a step in which a plurality of column address signals are input respectively to the second input pins. Row address command package length of the respective row address signals corresponds to a plurality of clock periods of a clock signal. Column address command package length of the respective column address signals corresponds to a plurality of clock periods of the clock signal. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009176398(A) 申请公布日期 2009.08.06
申请号 JP20080179303 申请日期 2008.07.09
申请人 NANYA SCI & TECHNOL CO LTD 发明人 YEH CHIH-HUI
分类号 G11C11/401;G06F12/00;G06F12/02;G11C11/407 主分类号 G11C11/401
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