发明名称 Circuit verification
摘要 In one embodiment, a method for verifying one or more particular properties of a circuit using a learning strategy to determine suitable values of particular verification parameters includes classifying each of multiple properties of a circuit according to circuit size and selecting a candidate property from the properties. The candidate property set includes one or more particular properties from each property class. The method also includes attempting to verify one or more particular properties of the circuit using the candidate property set and particular values of particular verification parameters. The method also includes determining suitable values of the particular verification parameters according the attempted verification of the particular properties of the circuit using the candidate property set and the particular values of the particular verification parameters.
申请公布号 US7571403(B2) 申请公布日期 2009.08.04
申请号 US20060279177 申请日期 2006.04.10
申请人 FUJITSU LIMITED 发明人 JAIN JAWAHAR;IYER SUBRAMANIAN K.;NARAYAN AMIT;SAHOO DEBASHIS;STANGIER CHRISTIAN
分类号 G06F17/50 主分类号 G06F17/50
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