发明名称 Fast lock-free post-wait synchronization for exploiting parallelism on multi-core processors
摘要 A method for improving parallel processing of computer programs. DOACROSS loops and similar code are identified and parallelized using a post-wait control structure. The post-wait control structure may be implemented to include any one of a single counter to enforce an order of execution, an array to track code completion that is indexed by a modulus of a positive integer number, and/or a set of arrays to track a last code completed by a thread and a current code being executed by a thread.
申请公布号 US7571301(B2) 申请公布日期 2009.08.04
申请号 US20060395841 申请日期 2006.03.31
申请人 INTEL CORPORATION 发明人 KEJARIWAL ARUN;SAITO HIDEKI;TIAN XINMIN;GIRKAR MILIND;SHAH SANJIV;LI WEI;BANERJEE UTPAL
分类号 G06F9/45;G06F9/52 主分类号 G06F9/45
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