发明名称 |
Wafer-level-chip-scale package and method of fabrication |
摘要 |
A wafer-level-chip-scale package and related method of fabrication are disclosed. The wafer-level-chip-scale package comprises a semiconductor substrate comprising an integrated circuit, a conductive ball disposed on the semiconductor substrate and electrically connected to the integrated circuit, and a protective portion formed from an insulating material and disposed on bottom and side surfaces of the semiconductor substrate.
|
申请公布号 |
US7569423(B2) |
申请公布日期 |
2009.08.04 |
申请号 |
US20080139771 |
申请日期 |
2008.06.16 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KWON YONG-HWAN;LEE CHUNG-SUN;KANG WOON-BYUNG |
分类号 |
H01L21/48;H01L23/34 |
主分类号 |
H01L21/48 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|