| 摘要 |
A semiconductor memory device, in which a plurality of data output lines are commonly used by a plurality of banks, includes a plurality of gate circuits each of which are provided at each intermediate position of the plurality of the data output lines, and is controlled to be turned on during a normal operation mode and to be turned off at least when reading data during a parallel test mode, and a comparator circuit that inputs in parallel and compares a signal of each separated part of the each data output line separated by the plurality of the gate circuit being turned off.
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