| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a technique that can prevent a wiring substrate and a solder resist from being separated even if a solid pattern is formed as a conductor pattern. <P>SOLUTION: Conductor patterns 21a-21d are formed on a chip mounting surface of a substrate 20. The conductor patterns 21a and 21b are what functions as reference interconnections, and the conductor pattern 21c is a conductor pattern functioning as a signal interconnection. Further, the conductor pattern 21d is a conductor pattern functioning as a power supply line. At this time, the conductor patterns 21a and 21b are formed as a solid pattern having an area larger than that of the conductor pattern 21c and 21d. In the central part of the conductor patterns 21a and 21b, two or more openings 24 are formed that reach the substrate 20. On the conductor patterns 21a and 21b, there are formed a region where the conductor patterns 21a and 21b and the solder resist get into contact and a region where the substrate 20 and the solder resist are directly brought into contact through the opening 24. <P>COPYRIGHT: (C)2009,JPO&INPIT |
