发明名称 |
Delay locked loop with frequency control |
摘要 |
Some embodiments include a delay line configured to apply a delay to an input signal to provide an output signal; an input circuit configured to provide the input signal based on a first signal, such that the cycle time of the input signal is different from a cycle time of the first signal; an output circuit configured to provide a second signal based on the output signal, the second signal having a cycle time different from a cycle time of the output signal; and a controller configured to adjust the delay to control a timing relationship between the first signal and the second signal. Other embodiments are described and claimed.
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申请公布号 |
US2009190420(A1) |
申请公布日期 |
2009.07.30 |
申请号 |
US20090368148 |
申请日期 |
2009.02.09 |
申请人 |
BELL DEBRA M;SILVESTRI PAUL A |
发明人 |
BELL DEBRA M.;SILVESTRI PAUL A. |
分类号 |
G11C7/00;G11C7/22;G11C8/18;H03L7/06;H03L7/081 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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