发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To solve the problem that it is difficult to reduce size and pitch of a pad since a pad is used both as wafer testing and bonding, so that a chip has a large area and high frequency characteristic cannot be improved. SOLUTION: A selection switch operated by an output of a differential output portion 11 is incorporated in a state detection portion 20, and an output state of the differential output portion is detected by the state detection portion 20. Further, a wafer testing pad 21 is separated from bonding pads 22 and 23. Since the size and pitch of the bonding pads 22 and 23 can be reduced, the chip area can be reduced and further the high frequency characteristic can be improved. Further, since flexibility of arrangement of the wafer testing pad 21 increases, the chip area can be more reduced. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009170735(A) 申请公布日期 2009.07.30
申请号 JP20080008594 申请日期 2008.01.18
申请人 YOKOGAWA ELECTRIC CORP 发明人 IRIE KOICHI
分类号 H01L21/66;H01L21/822;H01L27/04 主分类号 H01L21/66
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