发明名称 A CONTENTION FREE PARALLEL ACCESS SYSTEM AND A METHOD FOR CONTENTION FREE PARALLEL ACCESS TO A GROUP OF MEMORY BANKS
摘要 <p>A parallel access system (200) including: a group of processing entities (220) that comprises N processing entities; wherein N is a positive integer that exceeds one; a group of memory banks (210) that stores K information elements; wherein the group of memory banks comprises N pairs of single access memory banks; each pair of memory banks comprises an even memory bank and an odd memory bank; wherein each pair of memory banks stores sub-set of K/N information elements; wherein an even memory bank of each pair of memory banks stores even address information elements of a certain sub-set of K/N information elements and an odd memory bank of each pair of memory banks stores odd address information elements of the certain sub-set of K/N information elements; wherein K/N is an even positive integer; and a non-blocking interconnect (230), coupled to the group of processing entities and to the group of memory banks; wherein during each fetch cycle each processing entity of the group of processing entities fetches a first information element from an odd memory unit of a pair of memory banks and fetches a second information element from an even memory unit of the pair of memory banks; wherein the first and second information elements are two consecutive interleaved address information elements.</p>
申请公布号 WO2009093099(A1) 申请公布日期 2009.07.30
申请号 WO2008IB50206 申请日期 2008.01.21
申请人 FREESCALE SEMICONDUCTOR, INC.;NEEMAN., YUVAL;BERCOVICH, RON;DRORY, GUY;GILAD, DROR;LIVAY, AVIEL;NAOR, YONATAN 发明人 NEEMAN., YUVAL;BERCOVICH, RON;DRORY, GUY;GILAD, DROR;LIVAY, AVIEL;NAOR, YONATAN
分类号 H03M13/27 主分类号 H03M13/27
代理机构 代理人
主权项
地址