| 摘要 |
A computer system including a central processing unit (CPU), a chipset, a first bus, a second bus, a first memory, a second memory, and a logic control circuit is disclosed. The chipset is coupled to the CPU. The first bus and the second bus are respectively coupled to the chipset. The first memory is coupled to the chipset through the first bus for storing a first basic input output system (BIOS). The second memory is coupled to the chipset through the second bus for storing a second basic input output system (BIOS). The logic control circuit detects a state of the first bus and controls the chipset to select to access the first memory through the first bus or select to access the second memory through the second bus according to the state of the first bus. |
