| 摘要 |
PROBLEM TO BE SOLVED: To provide a spread spectrum clock generator (SSCG) capable of reducing the fluctuation in modulation of an output clock even if the delay time of a delay cell deviates from a target delay time. SOLUTION: The SSCG includes: a fine cell selecting circuit having a plurality of serially connected fine cells and delaying the time input clocks for the number of stages of fine cells selected in response to a first signal; a coarse cell selecting circuit having a plurality of serially connected coarse cells, and delaying an output signal of the time fine cell selecting circuit for the number of stages of coarse cells selected in response to a second signal and outputting the delayed output signal as an output clock; and a control circuit for generating and outputting the first and second signals in response to an output signal of the fine cell selecting circuit. The control circuit performs control every clock so that the change in the difference of the number of stages of coarse cells is not a negative value when an accumulative delay increases, but performs control every clock so that the change in the difference of the number of stages of coarse cells is not a positive value when the accumulative delay decreases. COPYRIGHT: (C)2009,JPO&INPIT
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