发明名称 CLUSTERED STACKED VIAS FOR RELIABLE ELECTRONIC SUBSTRATES
摘要 A substrate via structure for stacked vias in a substrate/chip assembly includes: a center via stack and a plurality of stacked vias clustered around the center via stack. In this structure, the center via and the surrounding vias are made of copper. Some of the surrounding vias may be non-functional vias and these may be of a different height than the functional vias.
申请公布号 US2009189290(A1) 申请公布日期 2009.07.30
申请号 US20080020565 申请日期 2008.01.27
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 KACKER KARAN;POWELL DOUGLAS O.;QUESTAD DAVID L.;RUSSELL DAVID J.;SRI-JAYANTHA SRI M.
分类号 H01L23/48;H01L21/00 主分类号 H01L23/48
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