| 摘要 |
A buffer output control circuit is provided to prevent a noise included in an external signal and a reference voltage signal from being transmitted to a DRAM by controlling the output of the buffer unit. A buffer power control circuit includes a selector(10), a comparator(20), a buffer(30), and a controller(40). The selector outputs an operation level power source of an external signal or a reference voltage signal according to a level selection signal. The comparator outputs a control signal by comparing the output signal of the selector with the reference voltage signal. The buffer outputs the internal signal by comparing the external signal with the reference voltage signal. The controller controls the output of the internal signal outputted from the buffer according to the control signal. The controller includes an operator. The operator performs the logic operation of the control signal and the output signal of the buffer. |
