发明名称 Cache for instruction set architecture using indexes to achieve compression
摘要 A method for compressing a set of instructions in an adaptive computing machine includes identifying frequently executed instructions, inserting an explicit caching instruction associating the identified instructions with an index value in the set of instructions before the identified instructions and replacing at least one instance of the frequently executed instructions subsequent to the explicit caching instruction with a compressed instruction referencing the index value. One or more instructions can be identified for compression, including groups of consecutive or non-consecutive instructions. The explicit caching instruction directs a node in an adaptive computing machine to store instructions in an instruction storage unit in association with an index value. Instructions stored in the storage unit are retrievable with reference to the index value. The compressed instruction may include one or more references to index values, and can include a sequence of index values indicating the sequence of execution of the associated instructions.
申请公布号 US7568086(B2) 申请公布日期 2009.07.28
申请号 US20070683026 申请日期 2007.03.07
申请人 NVIDIA CORPORATION 发明人 RAMCHANDRAN AMIT
分类号 G06F9/06;G06F;G06F9/00;G06F9/30;G06F9/302;G06F9/318;G06F9/38;G06F12/00;G06F12/02;G06F17/14 主分类号 G06F9/06
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