发明名称 Multiplex scheme conversion apparatus
摘要 A multiplex scheme conversion apparatus (103) includes (i) a packet loss judgment unit (202) that judges the packet loss of a TS packet, performs error processing in the case where a packet loss is detected, and outputs the payload data on which error processing has already been performed and (ii) a Box making unit (206) that makes 'moov' including error information and 'mdat' based on inputted AU data and the display time in a PES header.
申请公布号 US7567584(B2) 申请公布日期 2009.07.28
申请号 US20050033832 申请日期 2005.01.13
申请人 PANASONIC CORPORATION 发明人 TOMA TADAMASA;MATSUI YOSHINORI
分类号 H04J3/14;H04N7/12;H04N1/64;H04N7/24;H04N7/52 主分类号 H04J3/14
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