发明名称 ESD structure without ballasting resistors
摘要 An electrostatic discharge (ESD) structure connected to a bonding pad in an integrated circuit comprising: a P-type substrate with one or more first P+ regions connected to a low voltage supply (GND), a first Nwell formed in the P-type substrate, one or more second P+ regions disposed inside the first Nwell and connected to the bonding pad, at least one first N+ region disposed outside the first Nwell but in the P-type substrate and connected to the GND, at least one second N+ region disposed outside the first Nwell but in the P-type substrate and connected to the bonding pad, wherein the second N+ region is farther away from the first Nwell than the first N+ region, and at least one conductive material disposed above the P-type substrate between the first and second N+ regions and coupled to the GND, wherein the first N+ region, the second N+ region and the conductive material form the source, drain and gate of an NMOS transistor, respectively, and the first P+ region is farther away from the first Nwell than the NMOS transistor.
申请公布号 US7566935(B2) 申请公布日期 2009.07.28
申请号 US20070713193 申请日期 2007.03.01
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 LIN SHU HUEI;LEE JIAN HSING;HUANG SHAO CHANG;WU CHENG HSU;LEE CHUAN YING
分类号 H01L23/62 主分类号 H01L23/62
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