发明名称 Buffer architecture formed on a semiconductor wafer
摘要 In one embodiment, the present invention includes an apparatus for forming a transistor that includes a silicon (Si) substrate, a dislocation filtering buffer formed over the Si substrate having a first buffer layer including gallium arsenide (GaAs) nucleation and buffer layers and a second buffer layer including a graded indium aluminium arsenide (InAlAs) buffer layer, a lower barrier layer formed on the second buffer layer formed of InAlAs, and a strained quantum well (QW) layer formed on the lower barrier layer of indium gallium arsenide (InGaAs). Other embodiments are described and claimed.
申请公布号 US7566898(B2) 申请公布日期 2009.07.28
申请号 US20070712614 申请日期 2007.03.01
申请人 INTEL CORPORATION 发明人 HUDAIT MANTU K.;LOUBYCHEV DMITRI;DATTA SUMAN;CHAU ROBERT;FASTENAU JOEL M.;LIU AMY W. K.
分类号 H01L31/00 主分类号 H01L31/00
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