| 摘要 |
A DLL circuit and a control method is provided to operate a semiconductor integration circuit by generating a clock having a more improved duty ratio. A DLL circuit is composed of a clock division unit(200), a feedback loop(300), a half period delay unit(400), and an operation unit(500). The clock division unit generates a divided clock by dividing a reference clock with a creation division ratio. The feedback loop generates the delayed clock by performing delayed locked loop of the divided clock, and the half period delay unit produces a half period delay clock by delaying the delayed clock with a half period.
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