| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of preventing malfunction in a read operation. SOLUTION: A wiring line of an SRAM cell 10 for interconencting two inverter circuits 13 and 14 for entering output signals includes switches 15 and 16. By disconnecting the inverter circuits 13 and 14 from each other during a read operation, even when a potential of the L level of one of the inverter circuits 13 and 14 na and nb is increased by bit lines BL and/BL whose potentials become high during the read operation, its influence to the other portions is prevented, thus data is prevented from being inverted. COPYRIGHT: (C)2009,JPO&INPIT
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