| 摘要 |
PROBLEM TO BE SOLVED: To eliminate a circuit dedicated for refresh, as to a memory control circuit and a memory control method. SOLUTION: This memory control circuit/memory control method includes: an SDRAM 15 requiring refresh for holding data; CPUs 11, 12 sharing the SDRAM 15 via a bus; a mediating part 13 for receiving a bus request signal to be output when the CPUs 11, 12 access the SDRAM 15, and for transmitting a bus permission signal to the corresponding CPU, when permitting the use of the bus; and a selection part 14 for selecting access data to the SDRAM 15 transmitted from the CPU permitted to use the bus out of the CPUs 11, 12, by the mediating part 13. The CPU permitted to use the bus performs access required for refresh to the SDRAM 15 at least within a refresh period of the SDRAM 15. COPYRIGHT: (C)2009,JPO&INPIT
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