| 摘要 |
An auto-detecting input circuit is operative to sustain relatively high voltages applied to an input pad and generate corresponding signal levels at a native supply voltage range. The input circuit includes floating wells, corresponding bias selectors, and input biasing transistors to ensure that no gate oxide exposed to external voltages sustains a voltage greater than a predefined value. Bias selectors select an available highest voltage to reverse bias corresponding floating wells and ensure transistors are not electrically overstressed. As input-related terminals experience switching related voltages, the bias selectors select alternate terminals to continue selection of the highest voltage available and provide correct reverse biasing conditions. A resistor and clamp generate translated output voltage levels limited to the native supply voltage range. A latch is triggered by a first input signal excursion above the native supply voltage. The latch output enables pull-down transistors to provide a correct low-level output signal.
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