METHOD AND APPARATUS FOR POWER THROTTLING A PROCESSOR IN AN INFORMATION HANDLING SYSTEM

摘要

A power system couples to a multi-core processor to provide power to the processor. The power system throttles at least one of the cores of the processor when the power that the processor consumes from thepower systemexceeds a predetermined threshold power. The power systemmay reduce the rate of instruction issue by a particular core or clock gate a particular core to provide power throttling. The power system dynamically responds to variance of the actualoutput voltage that processor circuitryreceives from the power system in comparison to an expected output voltage over time and corrects for such variance.