发明名称 Clock generation circuit, analog-digital angle converter, and angle detection apparatus
摘要 <p>Two-phase resolver signals (S1,S2) output from a rotation angle detector (10) are squared by first and second squaring circuits (11,12). The squared signals (S1a,S2a) are added by an adding circuit (14). The DC component of the output signal from the adding circuit is removed by a filter (16). The output signal from the filter is compared with a reference potential by a comparator (18) to generate a rectangular-wave signal (SQ1). The phase of the rectangular-wave signal is corrected a phase shifter (20). The frequency of the output signal from the phase shifter is divided by 2 by a frequency dividing circuit in synchronization with an excitation signal supplied to the rotation angle detector (10) to generate a synchronous clock (SQ3).</p>
申请公布号 EP2078932(A1) 申请公布日期 2009.07.15
申请号 EP20090000102 申请日期 2009.01.07
申请人 JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED 发明人 NAKAZATO, KENICHI;NISHIMURA, HISASHI
分类号 G01D5/244;G01B7/30;G01D5/20;H03K5/00;H03L7/00;H03M1/08;H03M1/64;H04L27/22 主分类号 G01D5/244
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