发明名称
摘要 A semiconductor memory device having a crosspoint-type memory cell array includes a column readout voltage supply circuit 12 which supplies a predetermined first voltage when readout is selected, and supplies a second voltage different from the first voltage when the readout is not selected, to each of column selection lines BL, a row readout voltage supply circuit 11 which supplies the second voltage to each of row selection lines DL at the time of readout, a sense circuit 15 which senses a current flowing in the selected row selection line DL separately from a current flowing in the unselected row selection lines DL and senses an electric resistance state of the selected memory cell at the time of readout, and a row voltage displacement prevention circuit 31 which prevents a displacement in a supplied voltage level in at least selected row selection line DL at the time of readout.
申请公布号 JP4295680(B2) 申请公布日期 2009.07.15
申请号 JP20040177501 申请日期 2004.06.15
申请人 发明人
分类号 G11C11/15;G11C7/12;G11C7/18;G11C11/00;G11C16/02 主分类号 G11C11/15
代理机构 代理人
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