发明名称
摘要 <p>A fast Fourier transform circuit includes a computation component, an extraction component and a setting component. The extraction component, at each step of the computation, extracts, from computation result data points calculated by the computation component, data in a pre-specified range with a number of bits the same as a predetermined number of bits, which is an effective range for a butterfly computations. The setting component sets the data points of the predetermined number of bits which have been extracted by the extraction component to serve as input data when butterfly computations of a next step are to be performed by the computation component.</p>
申请公布号 JP4295777(B2) 申请公布日期 2009.07.15
申请号 JP20060261323 申请日期 2006.09.26
申请人 发明人
分类号 G06F17/14 主分类号 G06F17/14
代理机构 代理人
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