发明名称 PHASE LOCKED LOOP AND PHASE LOCKING METHOD THEROF
摘要 A phase locked loop and a phase locking method thereof are provided to reduce a time for reaching a target frequency by selecting a frequency range generating an output signal with the target frequency through one phase locked operation. A voltage controlled oscillator(140) generates an output signal with the output frequency within a predetermined frequency range in response to the output voltage of a loop filter(130). The voltage controlled oscillator includes a bank with a plurality of capacitors. An automatic frequency controller(170) operates in response to the output voltage of the loop filter. The automatic frequency controller controls the frequency range by controlling the capacitance of the voltage controlled oscillator for generating the output frequency while the phase locked loop performs the phase locked operation. An output frequency is synchronized with the target frequency according to the controlled frequency range.
申请公布号 KR20090077544(A) 申请公布日期 2009.07.15
申请号 KR20080003553 申请日期 2008.01.11
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK, EUN CHUL;SUH, CHUN DEOK;KOH, JEONG WOOK
分类号 H03L7/08 主分类号 H03L7/08
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