发明名称 Comparing counter contents for timing critical applications
摘要 An electrical circuit for comparing contents of counter circuits. The electrical circuit comprises a first counter circuit and a second counter circuit electrically connected to a flip-flop circuit through a logic circuit and OR gates connected to the flip flop circuit. The first counter circuit is for receiving a first enable signal and generating a first output signal. The second counter circuit is for receiving a second enable signal and generating a second output signal. The first enable signal and the second enable signal are for comparing the first output signal to the second output signal. The flip-flop circuit is for generating a first status signal defining a first relationship between the first output signal and the second output signal. The logic circuit is for generating a second status signal defining a second relationship between the first output signal and the second output signal.
申请公布号 US7561023(B2) 申请公布日期 2009.07.14
申请号 US20080052771 申请日期 2008.03.21
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 AMBILKAR SHRIDHAR N.;KURUP GIRISH G.
分类号 G05B1/00 主分类号 G05B1/00
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