发明名称 Netlist synthesis and automatic generation of PC board schematics
摘要 A computer implemented method and system for automatically generating a net list for a printed circuit board are described. Selection of one or more pins on a first and second component to be connected is based on one or more of a logical definition, an electrical definition, a distance property, and a programmable constraint. Once pins of the first and second connections are selected and connected, a net list is automatically generated. The net list includes information associated with the first component, information associated with the second component and at least one pin of the second component.
申请公布号 US7562331(B2) 申请公布日期 2009.07.14
申请号 US20080101068 申请日期 2008.04.10
申请人 TARAY TECHNOLOGIES (INDIA) PRIVATE LIMITED 发明人 GUPTA NAGESH CHANDRASEKARAN;BHARDE BHUPESH;ALAM QAMAR;KAITHARAM SUBRAMANIAM;CHAKRABORTY AVIK
分类号 G06F17/50;H03K19/00 主分类号 G06F17/50
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