发明名称 OVERLAY VERNIER
摘要 <p>An overlay vernier is provided, which enhances the measuring overlay accuracy although the attack including the heat accumulation occurs. The mother vernier(12) is implemented as a plurality of square patterns arranged symmetrically to the top and bottom and right and left. The daughter vernier(14) is formed in the central part of the mother vernier. The size of one side of the square pattern(10) is 2-3 micrometers. The square pattern does not use chrome. The square pattern is formed into the trench type or the mesa-type pattern. The overlay accuracy is measured in the method for measuring the scanning signal about each square pattern and averaging the signal.</p>
申请公布号 KR20090076144(A) 申请公布日期 2009.07.13
申请号 KR20080001904 申请日期 2008.01.07
申请人 HYNIX SEMICONDUCTOR INC. 发明人 BAE, JAE JUN
分类号 H01L21/027 主分类号 H01L21/027
代理机构 代理人
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