发明名称 |
STACK PACKAGE AND METHOD FOR FABRICATING OF THE SAME |
摘要 |
A stacked package and a method of manufacturing the same are provided, which can reduce the process cost and process time by forming the stacked package by utilizing semiconductor chips. Two or more semiconductor chips(110) are stacked in the stacked package. A plurality of via holes(V) are equipped in order to be mutually detached inside the semiconductor chip. The metal layer(120) is formed in the via hole around the semiconductor chip upper face including the side wall of the via hole. The insulating layer is adhered to the metal layer environment part including the interval part of the metal layers of the semiconductor chip upper face. The solder(140) electrically connects semiconductor chips. The plating layer is formed in the surface of the metal layer.
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申请公布号 |
KR20090076356(A) |
申请公布日期 |
2009.07.13 |
申请号 |
KR20080002253 |
申请日期 |
2008.01.08 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
LEE, SEUNG HYUN;SUH, MIN SUK;YANG, SEUNG TAEK;KIM, JONG HOON |
分类号 |
H01L23/12;H01L21/60;H01L23/48 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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