发明名称 Micro or below scale multi-layered heterostructure
摘要 A heteostructure having a first and a second layer, in micrometer or smaller (e.g. nanometer) scale, arranged in a configuration defining at least one undercut at one side of the second layer, underneath the first layer, is described herein. In various embodiments, the undercut is filled with passivation materials to protect the layers underneath the first layer. Further, in various embodiments, a large metal contact layer including coverage of the first layer sidewall may be employed to provide significant increase in contact area, and to reduce the device contact resist value.
申请公布号 US7560739(B2) 申请公布日期 2009.07.14
申请号 US20040879390 申请日期 2004.06.29
申请人 INTEL CORPORATION 发明人 ZHENG JUN-FEI
分类号 H01L29/201;H01L23/31;H01L29/06;H01L29/22;H01L31/0352;H01L31/105;H01L33/00 主分类号 H01L29/201
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