| 摘要 |
FIELD: physics. ^ SUBSTANCE: invention relates to semiconductor technology. The method of making power insulated-gate field-effect transistors involves making a protective coating with a top layer of silicon nitride on the face of the initial silicon nn+ or pp+ - substrate, opening windows in the protective coating, making channel regions of transistor cells in the high-resistivity layer of the substrate and heavily-doped by-pass layers and source regions inside the channel regions using ion implantation of doping impurities into the substrate through windows in the protective coating and subsequent diffusion distribution of implanted impurities. When making by-pass layers, the doping mixture is implanted into the substrate through windows in the protective coating without using additional masking layers. After diffusion redistribution of implanted impurities in by-pass layers on the entire perimetre of windows in the protective coating, selective underetching of lateral ends of the protective coating under silicon nitride is done. The silicon nitride layer is then removed from the entire face of the substrate and source regions of the transistor cells are formed through implantation of doping impurities into the substrate through windows in the protective coating. ^ EFFECT: invention is aimed at increasing avalanche break down energy, resistance to effect of ionising radiation and functional capabilities of silicon power transistors. ^ 5 dwg, 1 tbl |
