发明名称 |
Analog Output Circuit, Data Signal Line Driving Circuit, Display, and Potential Writing Method |
摘要 |
In one embodiment of the present invention, a voltage source is disclosed including a lower output impedance is connected to a capacitive load via a switch element and a voltage source including a higher output impedance is connected to the capacitive load via a switch element. Until a potential of an output terminal attains a reference potential, a comparator keeps the switch element in an ON state so that the voltage source writes a potential onto the capacitive load. When the potential of the output terminal exceeds the reference potential, the comparator causes the switch element to be in an ON state so that the voltage source writes a potential onto the capacitive load so as to have a predetermined potential.
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申请公布号 |
US2009174372(A1) |
申请公布日期 |
2009.07.09 |
申请号 |
US20070226131 |
申请日期 |
2007.02.13 |
申请人 |
MAEDA KAZUHIRO;SHIRAKI ICHIRO;SHIMIZU SHINSAKU;NISHI SHUJI |
发明人 |
MAEDA KAZUHIRO;SHIRAKI ICHIRO;SHIMIZU SHINSAKU;NISHI SHUJI |
分类号 |
H02J7/00;H02J3/00 |
主分类号 |
H02J7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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