发明名称 AGGREGATE WIRING BOARD AND SEMICONDUCTOR PACKAGE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide an aggregate wiring board having small warpage and small temperature dependency of warpage in a sheet-like aggregate wiring board while allowing the uppermost layer that becomes a semiconductor chip mount surface in each wiring board to tend to be warped in a recess when viewed from an upper side, and to provide a less warped semiconductor package. <P>SOLUTION: In the aggregate wiring board, which has a wiring board formation region and a dummy pattern formation region adjacent to the wiring board formation region, a plurality of wiring layers including the uppermost layer that becomes a semiconductor chip mount surface are laminated. In the aggregate wiring board, the wiring density of the uppermost layer in the wiring board formation region is lower than that of the other wiring layers of the wiring board formation region, and the tendency of the wiring density of the wiring layer from the uppermost layer to the lowermost layer in the dummy pattern formation region is set so that it conflicts with the tendency of the wiring density of the wiring layer from the uppermost layer to the lowermost layer in the wiring board formation region. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2009152282(A) 申请公布日期 2009.07.09
申请号 JP20070327100 申请日期 2007.12.19
申请人 SHINKO ELECTRIC IND CO LTD 发明人 MIYAMOTO TAKAHARU
分类号 H01L23/12;H05K1/02;H05K3/46 主分类号 H01L23/12
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